Advantages
Full bifold communication
Higher throughput than I²C or SMBus
Complete agreement adaptability for the $.25 transferred
Not bound to 8-bit words
Arbitrary best of bulletin size, content, and purpose
Extremely simple accouterments interfacing
Typically lower ability requirements than I²C or SMBus due to beneath dent (including pullups)
No adjudication or associated abortion modes
Slaves use the master's clock, and don't charge attention oscillators
Slaves don't charge a different abode -- clashing I²C or GPIB or SCSI
Transceivers are not needed
Uses alone four pins on IC packages, and affairs in lath layouts or connectors, abundant beneath than alongside interfaces
At a lot of one "unique" bus arresting per accessory (chip select); all others are shared
Signals are unidirectional acceptance for simple Galvanic isolation
edit Disadvantages
Requires added pins on IC bales than I²C, even in the "3-Wire" variant
No in-band addressing; out-of-band dent baddest signals are appropriate on aggregate buses
No accouterments breeze ascendancy by the bondservant (but the adept can adjournment the next alarm bend to apathetic the alteration rate)
No accouterments bondservant acceptance (the adept could be "talking" to annihilation and not apperceive it)
Supports alone one adept device
No error-checking agreement is defined
Generally decumbent to babble spikes causing adulterated communication
Without a academic standard, acceptance acclimation is not possible
Alone handles abbreviate distances compared to RS-232, RS-485, or CAN-bus
Many absolute variations, authoritative it difficult to acquisition development accoutrement like host adapters that abutment those variations
Full bifold communication
Higher throughput than I²C or SMBus
Complete agreement adaptability for the $.25 transferred
Not bound to 8-bit words
Arbitrary best of bulletin size, content, and purpose
Extremely simple accouterments interfacing
Typically lower ability requirements than I²C or SMBus due to beneath dent (including pullups)
No adjudication or associated abortion modes
Slaves use the master's clock, and don't charge attention oscillators
Slaves don't charge a different abode -- clashing I²C or GPIB or SCSI
Transceivers are not needed
Uses alone four pins on IC packages, and affairs in lath layouts or connectors, abundant beneath than alongside interfaces
At a lot of one "unique" bus arresting per accessory (chip select); all others are shared
Signals are unidirectional acceptance for simple Galvanic isolation
edit Disadvantages
Requires added pins on IC bales than I²C, even in the "3-Wire" variant
No in-band addressing; out-of-band dent baddest signals are appropriate on aggregate buses
No accouterments breeze ascendancy by the bondservant (but the adept can adjournment the next alarm bend to apathetic the alteration rate)
No accouterments bondservant acceptance (the adept could be "talking" to annihilation and not apperceive it)
Supports alone one adept device
No error-checking agreement is defined
Generally decumbent to babble spikes causing adulterated communication
Without a academic standard, acceptance acclimation is not possible
Alone handles abbreviate distances compared to RS-232, RS-485, or CAN-bus
Many absolute variations, authoritative it difficult to acquisition development accoutrement like host adapters that abutment those variations
No comments:
Post a Comment